When I read the Transmeta website, I got a strong whiff of the RISC vs. CISC debate. The chip appears to be VLIW, meaning "variable length instruction word," but what that means internally I don't know (yet; I signed up as a developer, but they pleaded inundation and haven't sent a byte of data..). It could be a varaible 8-32 bit word. But so's the Intel architecture, when you look inside it. The new Intel/HP designs have VLIW up to the multiple-word range. But maybe Crusoe can do that, too. What made me laugh, though, was their claim that they were improving the microprocessor field by moving operations from hardware to software. First, RISC used simple instructions and implemented complex ops by having the compiler unroll them. And second, all CISC chips--and some RISC chips--use internal microcode, meaning they do some ops using firmware control of simpler hardware capabilities. About the only thing novel I can see is the claim that Crusoe can remember certain snippets of software as though they were microcode. So you might be able to run an emulator-setup program on it, then just run your off-the-shelf software as though you owned the right processor for it. Which brings up another non-innovation innovation. DEC did the chameleon platform thing with the Rainbow computers. And lost its ass. Transmeta is taking a leap into empty space. It will be interesting to see if it can flap its arms hard enough to keep off the rocks below. --Blair "Or it's all hype and another Microchip."
From Comp.sys.wearables Newsgroup Archive (CSW)
Maintained by R. Paul McCarty
Archive created with babymail