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Re: CMOS Input protection

From: Andrew Plumb <>
Date: Mon, 3 Jan 2000 09:55:17 -0500 (EST)

On Mon, 3 Jan 2000, Bryan Andersen wrote:
[deletia]
> I don't remember the circuits off the top of my head but a common 
> one is to use clamping diodes to ground and Vcc then a resistor 
> inline.  The resistor needs to be sized for the expected input 
> signal charateristics.  Also along withe the chlamping diodes you 
> need to have a MOV type circuit between Vcc and ground.  Between 
> these circuits it should keep all the chips withing their maximum 
> pin to ground or Vcc differentials and keep the Vcc to ground 
> differential within limits.

Hi Bryan,

Yes, that's usually the type of circuit I've seen at the pads of chips
I've RE'd. (Reverse-engineered - my ex-job. :-) If I were still at my old
job, I could have a look at the pads of the PICs; they'd worked on the
chip before I arrived.

...One reason why Rhemi hasn't experienced problems with PIC inputs could
easily be because of the inductive length and "coiling" of the embroidered
trace.  It would naturally dampen and dissipate the touch-spike.

Andrew.

--

Andrew Plumb, VE3SLG
mailto://andrew(at)plumb(dot)org
http://www.plumb.org/tekmage/
spk2_0.0.2:  http://www.plumb.org/tekmage/source/spk2/

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