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[Fwd: Z80/WC, 3rd installment.]

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Message-ID: <>
Date: Wed, 06 Jan 1999 15:44:34 -0500
From: Lee Adamson <>
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To: Lee Adamson <>
Subject: Re: Z80/WC, 3rd installment.
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Aaaak!!!  Don't build it that way!

Fixed one problem and created another.  Sorry, I was tired.

Will post a fix tonight or tomorrow (I still haven't slept...).

Grrr.

Lee Adamson wrote:
> 
> Whew.  I'm really glad I'm asciifying this stuff...  I've caught and
> fixed several bugs already...
> 
> So, without further ado, the RAM/ROM:
> 
>   ------------------------------------------------------------------------
> Lots of ORs, huh?  Here's the RAM:
>        _______
> BA17--|Bad    |
> BA18--|snORe  |
> BA19--|Bleh   |-----------------------------+
> BA20--|       |                             |
> /RAM--|_______|                             |
>                                __________   |
>                               |       /CE|--+
>                               |       /OE|--/RD
>                           A0--|A0     /WE|--/WR
>                          ...--|...       |
> A14--------------+       A13--|A13       |
>                  |            |        D0|--D0
>                  |  ____      |       ...|--...
> BA14---------------|OR  |-----|A14     D7|--D7
>                  +-|____|     |          |
>                  |  ____      |          |
> BA15---------------|OR  |-----|A15       |
>                  +-|____|     |          |
>                  |  ____      |          |
> BA16---------------|OR  |-----|A16       |
>                  +-|____|     |__________|
> 
> Ok, wierdness needed to keep the banked and non-banked
>   RAM on the same chip.  A15 (on the bus) is irrevelant
>   A14 will be low when non-banked is accessed, and high
>   when banked is accessed, so the OR gates make A14-16
>   (on the chip) stay low when A14 is low, but let BA
>   lines through when A14 is high.  If you don't plan
>   on adding any RAM beyond the initial 128K, you can
>   axe the Big OR Gate (as well as part of the bank
>   switcher).
> 
> ROM:
>        _________
> A0----|A0    /CE|---/ROM
> ...---|...   /OE|---/RD
> A14---|A14  /PGM|---Vcc
>       |      UPP|---Vcc
> D0----|D0       |
> ...---|...      |
> D7----|D7       |
>       |_________|
> 
> That wasn't quite as confusing as the RAM, eh?

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